The CPU Architecture you’ve probably never of heard of, but soon will
Everyone’s familar with Intel and their x86 architecture, it’s been the dominant workstation and server class CPU architecture for the last 40 years. And then there’s ARM, the plucky Brit startup that took on the major US Chip manufacturers and dominated the Mobile and Microcontroller classes. The dominance of these two CPU architectures hasn’t left much room for any other players, probably IBM’s PowerPC is the only one that comes close, but today is a small niche player.
But now there’s a new kid on the block, RISC-V. RISC-V is the first fully Open Source license free CPU Architecture, a while in the making, but, in my view, set to completely transform computing hardware.
Berkeley 2010 - a quiet revolution started
RISC-V was born out of Berkeley’s Par Lab in 2010 headed by Prof. Krste Asanović. Asanović and his team had been working on a programme called ASPIRE with the goal of transforming CPU design. It was during this programme that Asanović first proposed the goal of designing an completely license free Open Source CPU and ISA (Instruction Set Architecture). The project was co-founded between Microsoft and DARPA and started in earnest in 2010.
For a number of years this project was largely confined to the Academic world with the early design iterations not really suitable for commercial applications. RISC-V started to break cover in 2018 with formation of the RISC-V Foundation and it was with this that the RISC-V core design and ISA was mature enough to field commercial processors. In March this year the RISC-V Foundation moved its incorporation from the US to Switzerland to ensure it did not become subject to US ITAR control. There’s a considerable dose of irony here as for 5 years the core programme was largely funded by US DoD DARPA.
So who’s using RISC-V and where can I get one?
The first commercial application of the RISC-V came from NVIDIA and Western Digital, both companies used RISC-V architectures in custom Microcontrollers embedded in their larger systems.
However, the first full blown CPU implementation came in 2019 from the Chinese Semiconductor company SiFive with their U8-Series single board computer (SBC). The most powerful RISC-V implementation currently is Alibaba’s XuanTie 910, a 2.5Mhz 16-core design.
In terms of getting one yourself, probably the cheapest way into RISC-V is via the SiPeed M1n Module AI Development Kit. Incredibly this tiny SBC costs a mere $10, and it is tiny measuring ~25mm square.
The SiPeed M1n is a good example of the kind of innovation RISC-V can enable. On this module is a 400MHz 64-bit Dual Core RISC-V K210 processor and on the same IP core there’s a hardware Neural Network Processor (NPU), FFT and Audio DSP. As you might expect from the board’s name, this device is aimed at AI at the edge. This module ships with an integral camera and microphone array for image and speech recognition. Interestingly it also has a Field Programmable I/O Array with 48 I/O slots mappable to 256 internal functions. This also extends further sensor networks with hardware accelerared signal processing.
So what’s the big transformation - it’s just another CPU?
Just as the pivot to Open Source software and Cloud Computing has transformed the software and IT services industry, I believe RISC-V will transform the computing hardware industry.
The license free design means that you can take a known proven well supported CPU core, that can run operating systems such as Linux, and extend it with special purpose hardware, whether that’s for signal processing or neuromorphic computing. And when I say you, I mean you, as an individual. I believe RISC-V will lead to very low cost and volume custom CPU design being open to everyone. Today, no individual has the resources to design and fabricate a custom CPU, but I believe a license free RISC-V design will make that business model feasible in the next 5 to 10 years, may be even sooner.
Cyber security - know your Microcode
Modern CPUs contain vast quantities of Microcode and with the major commercial CPU players this Microcode is, of course, proprietary and not available to inspect or test. There have been numerous security and privacy concerns over Microcode, Intel’s Trusted Platform Module (TPM) is a good example. With RISC-V the whole CPU design, including Microcode, is openly available and you can add your own security layers on top. This top to bottom control of the whole CPU architecture and inherent security is one of the reasons DARPA were supporting the programme. I can see RISC-V becoming the preferred Processor platform of Defence systems, over PowerPC and Intel, and there are signs this is already begining to happen.
What does this mean for Intel, AMD and ARM?
With the advent of 5G and explosion of IoT application domains, they’ll be an increasing demand for edge processing devices, a lot of them with specialist requirements that require hardware acceleration. The current business models of Intel, AMD and ARM don’t cater for such a complex and diverse ecosystem (yet), this is the sweet spot that RISC-V will enable.
I don’t see RISC-V displacing x86 or ARM anytime soon, as there’s a vast long established ecosystem for these CPU architectures and, of course, Intel, AMD and ARM are well aware of RISC-V and will have to adapt their business models accordingly. I suspect you will see RISC-V designs for specialist niche applications, coming from Intel, AMD and ARM in the near future.